Self aligned architectures in bipolar transistors are advantageous is that they provide better window downscaling and lower levels of parasitic capacitances and parasitic resistances. One commonly used prior art method of manufacturing self aligned bipolar transistors involves the use of a sacrificial nitride emitter and a raised external base.
Complex process steps are often required to form a self aligned bipolar transistor that has a sacrificial nitride emitter and a raised external base. Such complex process steps include selective epitaxial (EPI) growth and chemical mechanical polishing (CMP) procedures. These complex process steps increase the cost and processing time required to manufacture this type of self aligned bipolar transistors.
Therefore, there is a need in the art for a system and method that is capable of solving the problems that occur when such prior art methods are utilized. In particular, there is a need in the art for a system and method for providing an efficient process that is capable of manufacturing a self aligned bipolar transistor.
The method of the present invention solves the problems that are associated with the prior art by providing a self aligned bipolar transistor using a sacrificial polysilicon external base. An active region of a transistor is formed and a sacrificial polysilicon external base is formed above the active region of the transistor and covered with a silicon oxide layer. Then an emitter window is etched and filled with silicon nitride. An etch procedure is subsequently performed to remove the sacrificial polysilicon external base. Then a layer of doped polysilicon material is deposited to fill a cavity within the transistor formed by the removal of the sacrificial polysilicon external base. A polysilicon emitter structure is subsequently formed in the emitter window. The self aligned bipolar transistor architecture of the invention is compatible with BiCMOS technology.
Before undertaking the Detailed Description of the Invention below, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document: the terms “include” and “comprise,” as well as derivatives thereof, mean inclusion without limitation; the term “or,” is inclusive, meaning and/or; the phrases “associated with” and “associated therewith,” as well as derivatives thereof, may mean to include, be included within, interconnect with, contain, be contained within, connect to or with, couple to or with, be communicable with, cooperate with, interleave, juxtapose, be proximate to, be bound to or with, have, have a property of, or the like.
Definitions for certain words and phrases are provided throughout this patent document, those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior uses, as well as to future uses, of such defined words and phrases.